Low power circuit design for footed quasi resistance scheme in 45nm VLSI technology

Thumbnail Image

Files

80_recommendation.pdf (259.14 KB)
 abstract.pdf (259.83 KB)
 certificate.pdf (155.29 KB)
 chapter 1.pdf (681.89 KB)
 chapter 2.pdf (414.15 KB)

Date

item.page.authors

Journal Title

Journal ISSN

Volume Title

Publisher

Abstract

newline

Description

Keywords

Citation

URI

http://hdl.handle.net/10603/484938

Collections

Department of Electronics and Communication Engineering

item.page.endorsement

item.page.review

item.page.supplemented

item.page.referenced