Dynamically reconfigurable viterbi decoder

dc.contributor.guide	Varughese, Dharmishtan K.
dc.coverage.spatial	Information and Communication Engineering
dc.creator.researcher	Cyril, Sujatha
dc.date.accessioned	2017-03-23T05:36:27Z
dc.date.available	2017-03-23T05:36:27Z
dc.date.awarded	n.d.
dc.date.completed	december, 2015
dc.date.registered	n.d.
dc.description.abstract	Abstract available
dc.description.note	Data not available
dc.format.accompanyingmaterial	None
dc.format.dimensions	28cm.
dc.format.extent	xxviii, 171p.
dc.identifier.uri	http://hdl.handle.net/10603/141098
dc.language	English
dc.publisher.institution	Faculty of Information and Communication Engineering
dc.publisher.place	Chennai
dc.publisher.university	Anna University
dc.relation	159-170
dc.rights	university
dc.source.university	University
dc.subject.keyword	Circuit
dc.subject.keyword	Clock
dc.subject.keyword	Decoder
dc.subject.keyword	Viterbi
dc.subject.keyword	Wireless
dc.title	Dynamically reconfigurable viterbi decoder
dc.title.alternative
dc.type.degree	Ph.D.