VLSI Implementation of Fast Computation Using Signed Digit Numbers

dc.contributor.guideSingh L K
dc.coverage.spatialN.D.
dc.creator.researcherRani Reena
dc.date.accessioned2019-07-04T04:39:23Z
dc.date.available2019-07-04T04:39:23Z
dc.date.awarded1-1-2010
dc.date.completed2010
dc.date.registeredN.D.
dc.description.abstractnewline NO
dc.description.note
dc.format.accompanyingmaterialNone
dc.format.dimensionsA4-L
dc.format.extent236
dc.identifier.urihttp://hdl.handle.net/10603/249358
dc.languageEnglish
dc.publisher.institutionDepartment of Physics and Electronics
dc.publisher.placeFaizabad
dc.publisher.universityDr. Rammanohar Lohia Avadh University, Faizabad
dc.relationN.D.
dc.rightsuniversity
dc.source.universityUniversity
dc.subject.keywordFast Computation Using Signed Digit Numbers
dc.subject.keywordVLSI Implementation
dc.titleVLSI Implementation of Fast Computation Using Signed Digit Numbers
dc.title.alternative
dc.type.degreePh.D.

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