Error tolerant sample preparation with Digital microfluidic lab on chip

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dc.contributor.guideRahaman, Hafizur and Bhattacharya, Bhargab B
dc.coverage.spatial
dc.creator.researcherPoddar, Sudip
dc.date.accessioned2023-04-26T05:39:12Z
dc.date.available2023-04-26T05:39:12Z
dc.date.awarded2019
dc.date.completed2018
dc.date.registered2015
dc.description.abstractAttached
dc.description.note
dc.format.accompanyingmaterialNone
dc.format.dimensions29 cm
dc.format.extent218
dc.identifier.urihttp://hdl.handle.net/10603/479419
dc.languageEnglish
dc.publisher.institutionSchool of VLSI Technology
dc.publisher.placeShibpur
dc.publisher.universityIndian Institute of Engineering Science and Technology, Shibpur
dc.relation
dc.rightsself
dc.source.universityUniversity
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Multidisciplinary
dc.titleError tolerant sample preparation with Digital microfluidic lab on chip
dc.title.alternative
dc.type.degreePh.D.

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