Design and analysis of clock gating Elements for energy efficient Implementations on fpga

dc.contributor.guideRajakumar, G
dc.coverage.spatialDesign and analysis of clock gating Elements for energy efficient Implementations on fpga
dc.creator.researcherAgnes shiny Rachel, N
dc.date.accessioned2023-10-05T11:01:11Z
dc.date.available2023-10-05T11:01:11Z
dc.date.awarded2022
dc.date.completed2022
dc.date.registered
dc.description.abstractSignal processing is the need of the day for areas such as newlinebiomedical analysis and video processing applications etc. This is because in newlineall imaginable fields, signals are used to transmit information. Signal newlineprocessing is used in communication, to improve the quality of audio and newlinevideo, for security purposes in detecting weapons and most importantly in newlinemedical diagnosis. Therefore researches focusing on signal processing serve newlineas an essential contribution in improving the world on whole. Filter is a part newlineof the signal processing circuit that helps in improving the quality of the newlineincoming signal by removing the unwanted noise and frequencies. Filter newlinedesign therefore has to be taken care and filters should be constructed with newlineprecise device parameters which can enable efficient removal of background newlinenoise and improve quality of the input signals. In addition to this, in the fast newlinegrowing Very Large Scale Integration (VLSI) era, all circuits are expected to newlineoperate with low power utilization. Design of an authenticated low power newlineFinite Impulse Response (FIR) filter hence has become an area of intense newlineresearch concern. In the recent years, Least Mean Square (LMS) filter design newlinehas been used for various applications. The first contribution proposed in newlinethis research work aims at creating a novel structure for a power efficient newlineadaptive Finite Impulse Response Least Mean Square FIR LMS filter to newlineprocess signals. The filter design is improved with inclusion of the Coordinate newlineRotation Digital Computer (CORDIC) multiplier architecture that newlineuses simple Shift and add mechanism for computation, reducing area and newlinedelay of the design when compared with the conventional multiplication newlinetechniques. newline newline
dc.description.note
dc.format.accompanyingmaterialNone
dc.format.dimensions21cm
dc.format.extentxx,139p.
dc.identifier.urihttp://hdl.handle.net/10603/516195
dc.languageEnglish
dc.publisher.institutionFaculty of Information and Communication Engineering
dc.publisher.placeChennai
dc.publisher.universityAnna University
dc.relationp.126-138
dc.rightsuniversity
dc.source.universityUniversity
dc.subject.keywordclock gating
dc.subject.keywordDesign and analysis
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic
dc.subject.keywordfpga
dc.titleDesign and analysis of clock gating Elements for energy efficient Implementations on fpga
dc.title.alternative
dc.type.degreePh.D.

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