Scalable and low power network on chip design for reconfigurable systems

dc.contributor.guide	Kumar, Yogendera
dc.coverage.spatial
dc.creator.researcher	Mittal, Himani
dc.date.accessioned	2021-02-08T10:28:33Z
dc.date.available	2021-02-08T10:28:33Z
dc.date.awarded
dc.date.completed	2017
dc.date.registered
dc.description.abstract	newline
dc.description.note
dc.format.accompanyingmaterial	DVD
dc.format.dimensions
dc.format.extent
dc.identifier.uri	http://hdl.handle.net/10603/314490
dc.language	English
dc.publisher.institution	School of Electrical, Electronics and Communication Engineering
dc.publisher.place	Greater Noida
dc.publisher.university	Galgotias University
dc.relation
dc.rights	university
dc.source.university	University
dc.subject.keyword	Engineering
dc.subject.keyword	Engineering and Technology
dc.subject.keyword	Engineering Electrical and Electronic
dc.title	Scalable and low power network on chip design for reconfigurable systems
dc.title.alternative
dc.type.degree	Ph.D.