Design of Hardware Efficient Rational Decimated Filter Banks using Partial Cosine Modulation and Sub band Merging

Abstract

High performance multirate filter banks have become extremely significant digital newlinesignal processing (DSP) components in the areas such as wireless communications, newlinebiomedical signal processing and speech and image compression due to its capability newlineto decompose the signal into various frequency sub-bands. Many real-time newlinesystems incorporate DSP algorithms and devices, which require computationally newlineintensive operations and hence, impose highly stringent performance requirements. newlineDepending on the application, these devices have to be optimized for the conflicting newlineperformance objectives such as speed, power consumption (battery life), area and newlinecost. There should be a trade-off between these goals, which is exacerbated further newlineby the additional requirements of flexibility to support emerging standards in communication newlineapplications and upgradability to newer algorithms. The realization of newlinethese algorithms on the general-purpose processors is not found to be suitable for newlinethe latest ultra low power applications. As a result, implementing them on dedicated newlinehardware platforms with customized arithmetic components is desirable. newlineThe filter banks may be either integer or rational decimated. In the integer newlinedecimated filter banks, the interpolation factors need to be 1 always. Whereas, in newlinethe rational decimated filter banks, the interpolation factors can be of any integer newlinevalue. Thus, among the different filter bank configurations, the rational decimated newlinenon-uniform filter banks (RDNUFBs) with arbitrary sampling factors offer more newlineflexibility in the frequency partitioning. Hardware and power efficient realization of newlinethe filter banks is a major research work in the recent times because of their wide newlineapplications in modern day portable devices, biomedical systems and communication newlinesystems. However, the high complexity and delay are the major challenges in the newlinedesign of RDNUFB for high-performance systems applications. newline