Few performance enhancement techniques for LSI compatible analog MOS circuits
| dc.contributor.guide | Bhattacharyya, A.B. and Chandra, S. | |
| dc.coverage.spatial | Centre for Applied Research in Electronics | |
| dc.creator.researcher | Aggarwal, Sudhir | |
| dc.date.accessioned | 2024-11-22T11:07:38Z | |
| dc.date.available | 2024-11-22T11:07:38Z | |
| dc.date.awarded | 1987 | |
| dc.date.completed | 1987 | |
| dc.date.registered | ||
| dc.description.abstract | Abstract Available | |
| dc.description.note | NA | |
| dc.format.accompanyingmaterial | DVD | |
| dc.format.dimensions | NA | |
| dc.format.extent | NA | |
| dc.identifier.uri | http://hdl.handle.net/10603/602380 | |
| dc.language | English | |
| dc.publisher.institution | Centre for Applied Research in Electronics | |
| dc.publisher.place | Delhi | |
| dc.publisher.university | Indian Institute of Technology Delhi | |
| dc.relation | TH1556 | |
| dc.rights | university | |
| dc.source.university | University | |
| dc.subject.keyword | Engineering | |
| dc.subject.keyword | Engineering and Technology | |
| dc.subject.keyword | Engineering Electrical and Electronic | |
| dc.title | Few performance enhancement techniques for LSI compatible analog MOS circuits | |
| dc.title.alternative | NA | |
| dc.type.degree | Ph.D. |
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