Testable design of logic circuits and reversible circuits

dc.contributor.guide	Chakraborty, Susanta and Duttagupta, Rana
dc.coverage.spatial
dc.creator.researcher	Sarkar, Pradyut
dc.date.accessioned	2018-09-25T04:26:32Z
dc.date.available	2018-09-25T04:26:32Z
dc.date.awarded	2016
dc.date.completed	2016
dc.date.registered	n.d.
dc.description.abstract	None newline
dc.description.note	Bibliography p. 118-136
dc.format.accompanyingmaterial	None
dc.format.dimensions
dc.format.extent	xviii, 136 p.
dc.identifier.uri	http://hdl.handle.net/10603/217479
dc.language	English
dc.publisher.institution	Department of Computer Science and Engineering
dc.publisher.place	Kolkata
dc.publisher.university	Jadavpur University
dc.relation
dc.rights	university
dc.source.university	University
dc.subject.keyword	Electric circuits
dc.subject.keyword	Logic circuits
dc.subject.keyword	Reversible circuits
dc.title	Testable design of logic circuits and reversible circuits
dc.title.alternative
dc.type.degree	Ph.D.