Design And Hardware Chip Implementation Of OFDMA In Wireless Communication System

Abstract

High bit rate transmission of at least several megabits per second is required for quicker communication in broadband multimedia mobile communication systems. When digital data is transferred at a rate of several megabits per second. However, the total delay time of the delayed waves is greater than one symbol time. Other symbols are being interfered with by the delayed waves, and the consequences of this interference must be removed from the received signal values. Various approaches can be used to attain this purpose. newlineThe FFT is one of the most important algorithms used in digital signal processing and digital communication applications to compute fast operations. FFT and IFFT are widely used in modulation and demodulation schemes such as OFDM, OFDMA, TV broadcasting, Digital radio broadcasting, etc. The different FFT processor architectures are used for several applications. The Xilinx ISE tool has FFT Core, which can be directly used for several applications. FFT supports four types of architectures: Radix 2 lite burst IO, Radix 2 burst IO, Radix 4 burst IO, and Pipelined IO. The research work focuses on the hardware chip performance analysis of the variable length FFT processor architectures on Field Programmable Gate Array platform using VHDL programming in which FFT length varies from 8 points to 65536 points. The input data stream is considered 8 bit, 16 bit and 32 bit. The estimated hardware chip performance parameters are DSP Slices and Block RAM. The timing parameter is transformed cycles and frequency. It is estimated that radix 2 lite burst IO performs better in terms of hardware resource utilization on FPGA and pipelined hardware architecture performs better in terms of transform cycles in comparison to other FFT architectures. The decoded 1024 point FFT signal is observed in Xilinx ISE software integrated Chipscope Pro analyzer. The analysis predicts the best suited FFT hardware architecture when the designer is going to design the hardware chip on the FPGA platform for several applications. newline