High Performance FIR Filter Architectures using Algorithmic Level Transformations and Improved Add Multiply Operations

dc.contributor.guide	Shahana, T K
dc.coverage.spatial
dc.creator.researcher	Pramod, P
dc.date.accessioned	2023-09-04T08:17:14Z
dc.date.available	2023-09-04T08:17:14Z
dc.date.awarded	2023
dc.date.completed	2022
dc.date.registered	2017
dc.description.abstract	newline
dc.description.note
dc.format.accompanyingmaterial	DVD
dc.format.dimensions
dc.format.extent	xxi,249
dc.identifier.uri	http://hdl.handle.net/10603/510333
dc.language	English
dc.publisher.institution	School of Engineering
dc.publisher.place	Cochin
dc.publisher.university	Cochin University of Science and Technology
dc.relation
dc.rights	university
dc.source.university	University
dc.subject.keyword	Electronics Engineering
dc.subject.keyword	Engineering and Technology
dc.subject.keyword	FIR Filter Architecture
dc.subject.keyword	Modular Hybrid Adders
dc.title	High Performance FIR Filter Architectures using Algorithmic Level Transformations and Improved Add Multiply Operations
dc.title.alternative
dc.type.degree	Ph.D.