Design and FPGA Implementation of Digital Circuits Using Reversible Logic
| dc.contributor.guide | Sujatha B K | |
| dc.coverage.spatial | ||
| dc.creator.researcher | D. K. Nayana | |
| dc.date.accessioned | 2019-12-05T10:29:20Z | |
| dc.date.available | 2019-12-05T10:29:20Z | |
| dc.date.awarded | 30/09/2019 | |
| dc.date.completed | 30/05/2018 | |
| dc.date.registered | 03/08/2013 | |
| dc.description.note | ||
| dc.format.accompanyingmaterial | None | |
| dc.format.dimensions | ||
| dc.format.extent | 162 p. | |
| dc.identifier.uri | http://hdl.handle.net/10603/263364 | |
| dc.language | English | |
| dc.publisher.institution | Dept. of Electronics Engineering | |
| dc.publisher.place | Bengaluru | |
| dc.publisher.university | Jain University | |
| dc.relation | ||
| dc.rights | university | |
| dc.source.university | University | |
| dc.subject.keyword | Engineering and Technology,Engineering,Engineering Electrical and Electronic | |
| dc.title | Design and FPGA Implementation of Digital Circuits Using Reversible Logic | |
| dc.title.alternative | ||
| dc.type.degree | Ph.D. |
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