Power Conscious Test Strategy For Silicon Microchips

dc.contributor.guide	Pohit,MausumiandGrover Anuj
dc.coverage.spatial
dc.creator.researcher	Pathak,Shalini
dc.date.accessioned	2023-02-18T09:53:51Z
dc.date.available	2023-02-18T09:53:51Z
dc.date.awarded	2019
dc.date.completed	2018
dc.date.registered	2012
dc.description.abstract	newline
dc.description.note
dc.format.accompanyingmaterial	DVD
dc.format.dimensions
dc.format.extent
dc.identifier.uri	http://hdl.handle.net/10603/462619
dc.language	English
dc.publisher.institution	Department of Applied Physics
dc.publisher.place	Greater Noida
dc.publisher.university	Gautam Buddha University
dc.relation
dc.rights	university
dc.source.university	University
dc.subject.keyword	Physical Sciences
dc.subject.keyword	Physics
dc.subject.keyword	Physics Applied
dc.title	Power Conscious Test Strategy For Silicon Microchips
dc.title.alternative
dc.type.degree	Ph.D.