Adaptive work stealing run times for NUMA multi core architecture

dc.contributor.guide	Wankar, Rajeev and Rao, C Raghavendra
dc.coverage.spatial	Computer science
dc.creator.researcher	B Vikranth
dc.date.accessioned	2021-02-19T12:35:31Z
dc.date.available	2021-02-19T12:35:31Z
dc.date.awarded
dc.date.completed	2018
dc.date.registered
dc.description.abstract	file attached
dc.description.note	references p.115-123
dc.format.accompanyingmaterial	None
dc.format.dimensions	-
dc.format.extent	123 p.
dc.identifier.uri	http://hdl.handle.net/10603/315955
dc.language	English
dc.publisher.institution	Department of Computer and Information Sciences
dc.publisher.place	Hyderabad
dc.publisher.university	University of Hyderabad
dc.relation	-
dc.rights	university
dc.source.inflibnet	INFLIBNET
dc.subject.keyword	Computer Science
dc.subject.keyword	Computer Science Artificial Intelligence
dc.subject.keyword	Engineering and Technology
dc.subject.keyword	Multi core architecture
dc.subject.keyword	Non uniform memory access
dc.title	Adaptive work stealing run times for NUMA multi core architecture
dc.title.alternative	-
dc.type.degree	Ph.D.