Novel Gate Overlap Tunnel FET Device Designs for Ultra Low Power Digital Ternary and Analog VLSI Applications
Loading...
Date
item.page.authors
Journal Title
Journal ISSN
Volume Title
Publisher
Abstract
newline
English
हिन्दी (Hindi)
తెలుగు (Telugu)
தமிழ் (Tamil)
ಕನ್ನಡ (Kannada)
മലയാളം (Malayalam)
मराठी (Marathi)
ગુજરાતી (Gujarati)
ਪੰਜਾਬੀ (Punjabi)
বাংলা (Bengali)
ଓଡ଼ିଆ (Odia)
অসমীয়া (Assamese)
नेपाली (Nepali)
कोंकणी (Konkani)
মৈতৈলোন (Meitei / Manipuri)
Mizo (Lushai)