Design and development of reconfigurable parameterization approach based VLSI architecture for FFT and DWT algorithms

dc.contributor.guideRani, Hemamalini,R
dc.coverage.spatialComputer science and engineering
dc.creator.researcherVenkatesh, J
dc.date.accessioned2016-05-06T05:57:08Z
dc.date.available2016-05-06T05:57:08Z
dc.date.awardedn.d.
dc.date.completed2014
dc.date.registeredn.d.
dc.description.abstractAbstract available
dc.description.noteReference p.162-169 and publication p.170 given
dc.format.accompanyingmaterialNone
dc.format.dimensions-
dc.format.extent170p.
dc.identifier.urihttp://hdl.handle.net/10603/88786
dc.languageEnglish
dc.publisher.institutionDepartment of Computer Science and Engineering
dc.publisher.placeDelhi
dc.publisher.universitySt Peters University
dc.relation-
dc.rightsuniversity
dc.source.inflibnetINFLIBNET
dc.subject.keywordAlgorithms
dc.subject.keywordDesign
dc.subject.keywordDevelopment
dc.subject.keywordParameterization
dc.titleDesign and development of reconfigurable parameterization approach based VLSI architecture for FFT and DWT algorithms
dc.title.alternative-
dc.type.degreePh.D.

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