Novel PWM Strategy for LDN Integrated Reduced Switch Count Multilevel Inverter

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dc.contributor.guideTara Kalyani S
dc.coverage.spatial
dc.creator.researcherSathyavani Bandela
dc.date.accessioned2025-11-03T10:31:39Z
dc.date.available2025-11-03T10:31:39Z
dc.date.awarded2025
dc.date.completed2025
dc.date.registered2015
dc.description.abstractAttached
dc.description.note
dc.format.accompanyingmaterialDVD
dc.format.dimensions
dc.format.extent91pp.
dc.identifier.researcherid
dc.identifier.urihttp://hdl.handle.net/10603/670839
dc.languageEnglish
dc.publisher.institutionDepartment of Electrical and Electronics Engineering
dc.publisher.placeKukatpally
dc.publisher.universityJawaharlal Nehru Technological University, Hyderabad
dc.relation
dc.rightsuniversity
dc.source.universityUniversity
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic
dc.subject.keywordLevel Doubling Network (LDN)
dc.subject.keywordMultilevel Inverters
dc.subject.keywordPulse Width Modulation (PWM)
dc.titleNovel PWM Strategy for LDN Integrated Reduced Switch Count Multilevel Inverter
dc.title.alternative
dc.type.degreePh.D.

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