Design of high performance Controller with FPGA as an IP core

Abstract

The 8-bit microcontrollers have growing demand in different newlineareas of applications as medical, consumer appliances, smart metering, newlineATMS, vending machines etc. With small improvements in their newlinehardware architecture, they can be made to perform efficiently in terms newlineof operation throughput and power consumption at a reduced cost. newlineIt is now a challenging task to find the best suitable controller newlineout of plenty eligible devices for the specific application. In real world newlineembedded application, custom developed embedded system has to newlineperform a fixed repetitive task and process the generated data to drive or newlineshape the output according to the system requirement. Sometimes, the newlinedata processing or decisions making task is assigned to the stand alone newlinedevice (distributive) or the interconnected processing device in which the newlinedata passing and processing is done centrally i.e. master device (central newlinecontrol system). newlineThough, some modern battery powered systems are intended newlineto run the smart algorithms such as Artificial Intelligence (AI) to take newlinedecision at its own level, it is required to process huge amount of newlineproduced without draining the power sources. This would inevitably newlinedecrease the performance of overall embedded system and affect overall newlineoperation. Regulating the power consumption to extend battery lifecycle newlineis an important goal in such applications. newlineThe present research presents a novel implementation of newlinehybrid 8-Bit controller design, which can process mixed size data newlinevi newlineoperations by efficiently utilizing multiple ALUs in single data path. The newlineobjective of the research work includes: implementation of 16-Bit Cooperative newlineALU (C-ALU) with 16-Bit registers in a 8-Bit Controller data newlinepath which can execute 16-bit instructions, design of hardware multiplier newlinebased on add-shift algorithm for the 8-bit Controller data path and newlinedeveloping a new-hybrid microcontroller architecture by integration of newline16-bit C-ALU, 16-bit registers and a 8-bit hardware multiplier along newlinewith conventional elements of 8-bit microcontroller.