Resource efficient FPGA implementation and weighted logarithmic model for enhancement of fog degraded images

dc.contributor.guide	Sharma, K K
dc.coverage.spatial	Electronics and Communication engineering
dc.creator.researcher	Gupta, Hitendra
dc.date.accessioned	2022-01-20T11:43:38Z
dc.date.available	2022-01-20T11:43:38Z
dc.date.completed	2019
dc.description.abstract	file attached
dc.description.note	references given
dc.format.accompanyingmaterial	None
dc.format.dimensions	-
dc.format.extent	70 p.
dc.identifier.uri	http://hdl.handle.net/10603/357244
dc.language	English
dc.publisher.institution	Department of electronics and communication engineering
dc.publisher.place	Jaipur
dc.publisher.university	Malaviya National Institute of Technology Jaipur
dc.relation	no. of references 42
dc.rights	university
dc.source.inflibnet	INFLIBNET
dc.subject.keyword	Engineering and Technology
dc.subject.keyword	Engineering
dc.subject.keyword	Engineering Electrical and Electronic
dc.subject.keyword	Field programmable gate arrays
dc.subject.keyword	Programmable logic devices
dc.subject.keyword	Logarithmic functions
dc.subject.keyword	Logarithms
dc.title	Resource efficient FPGA implementation and weighted logarithmic model for enhancement of fog degraded images
dc.title.alternative	-
dc.type.degree	Ph.D.