Study of double gated junction less transistor and its TIG configuration for dynamic C2 MOS application

Abstract

In the initial objective of this dissertation, the configuration of the Double Gated Junctionless Transistor (DG JLT) is carried out integrating an S-Si channel at the 14nm technology node and a 0.8V supply in Sentaurus TCAD to enhance speed, achieve superior channel controllability, and minimize Short Channel Effects (SCEs). While the S-Si device demonstrates remarkable performance in the ON state, its performance in the OFF state, particularly in the subthreshold region, is undesirable due to high leakage and excessive threshold voltage (VT H)-roll off. To address this issue, further exploration involves replacing the polysilicon gate with a metal gate featuring variable work functions, known as work function tuning (WFT). Simulation results reveal that the S-Si in Conventional DG JLT offers a 7.8% improvement in ON current due to mobility enhancement, but it also leads to 11.3x higher leakage and a 34% roll-off in VT H, issues subsequently mitigated by WFT. Upon analyzing metrics such as ION /IOF F ratio, Subthreshold Slope (SS), VT H, and Transconductance (GM), the proposed devices are further examined for their analog/RF performance. Strain presence enhances certain analog parameters, such as transconductance generation factors (TGF) and Intrinsic gain (AV), but degrades performance in terms of output resistance RO/conductance (GD) and early voltage (VEA). Overall RF performance is superior in the two strained-induced devices compared to the conventional DG JLT. Validation of the proposed devices involves configuring various circuits, including an inverter, inverter chain, ring oscillator (RO), hybrid full adder (HFA), and SRAM. It is observed that the WFT device consistently delivers better performance in most circuits, both in terms of power consumption and delay. newlineIn the second objective of this study, the design and exploration of a novel 14nm configuration with Triple Independent Gate (TIG) are conducted on the conventional DG JLT.