Performance aware scheduling approaches to allocate periodic real time tasks and investigation of interconnect network power consumption of multicore architecture

Abstract

The trend towards implementing multicore processors on realtime computational system was increased day by day due to its high performance and the ability to solve complex algorithms with minimum computation time. Most of the real time systems are used to provide solutions to the complex functions in which time, power and temperature are major constraints. So, in order to achieve an optimized solution for such system, a multicore processor with performance aware scheduler can be used. Based on the characteristics of the multicore architecture, it is classified into homogeneous and heterogeneous multicore processor. The first architecture is widely used in many realtime systems, since each core has the same characteristics. The second type of architecture is mainly used as an accelerator for large scale newlineCom puting applications. In our work, the homogeneous multicore architecture is considered in which the power consumption, core utilization and deadline missrate are performance issues. The power consumed by this architecture is due to executing tasks on core, core voltage transaction and interconnect network components. These parameters are optimized by introducing performance aware scheduling approaches through considering multiple objectives such as minimizing power consumption, maximum core utilization and low deadline missrate. If a given realtime task utilizes the core at the maximum, the remaining free cores can be shut-off such that the power consumption becomes minimized. While performing this repartitioning newlinetechnique, the deadline missrate should be as low as possible. In the earlier studies, the Earliest Deadline First (EDF), Rate Monotonic (RM) and heuristic approaches were used to schedule the real time task to multicore processor. newline newline