High performance signature detection architectures for network applications

dc.contributor.guideKrishnan, A.en_US
dc.coverage.spatialen_US
dc.creator.researcherArun, M.en_US
dc.date.accessioned2013-10-03T08:44:12Z
dc.date.available2013-10-03T08:44:12Z
dc.date.awardeden_US
dc.date.completeden_US
dc.date.issued2013-10-03
dc.date.registered2, May 2011en_US
dc.description.abstractThe continuous growth in the Internet s size, the amount of data traffic, and the complexity of processing the traffic give rise to new challenges in building high performance network devices. One of the most fundamental tasks performed by these devices is detecting the signature for predefined keys. Address lookup, packet classification, and deep packet inspection are some of the operations which involve Signature Detection Technique (SDT). SDT is typically a part of the packet forwarding mechanism, and may create a performance bottleneck. More than that software based SDT algorithms are normally slow which can not match with today s high speed network traffic. Therefore, fast and resource efficient hardware architectures are required. Most commonly used hardware based techniques for such signature detection are Finite Automata, Discrete Comparators, Knuth-Morris-Pratt (KMP) Algorithm, Content addressable Memory (CAM) and Bloom Filter. While CAM can offer very fast search, it is expensive and consumes a large amount of power. A Bloom filter is a randomized data structure used to represent a set of bit-strings compactly and support set membership queries. Hence, designing high performance, powerefficient and high-speed signature detection techniques has received a great deal of attention in the research and industrial community. In this research, high performance signature detection techniques based on CAM and Bloom filters are proposed. The main focus is on pre computation and look up techniques to achieve effective hardware based signature detection techniques to detect the signatures. 10 GBPS Network Traffic Generator (TNTG) is used to test the functionality and ensure the reliability of the proposed architectures. This approach involves a unique combination of algorithmic and architectural techniques that outperform some of the current techniques in terms of performance, speed and power-efficiency. newline newline newlineen_US
dc.description.noteAppendix 1; pp. 96-97en_US
dc.format.accompanyingmaterialNoneen_US
dc.format.dimensions23.5 cm x 15 cmen_US
dc.format.extentxvi, 110en_US
dc.identifier.urihttp://hdl.handle.net/10603/11703
dc.languageEnglishen_US
dc.publisher.institutionFaculty of Information and Communication Engineeringen_US
dc.publisher.placeChennaien_US
dc.publisher.universityAnna Universityen_US
dc.relation105en_US
dc.rightsuniversityen_US
dc.source.universityUniversityen_US
dc.titleHigh performance signature detection architectures for network applicationsen_US
dc.title.alternativeen_US
dc.type.degreePh.D.en_US

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