Skip to main content
Home
About Us
All of Shodhganga
Statistics
English
हिन्दी (Hindi)
తెలుగు (Telugu)
தமிழ் (Tamil)
ಕನ್ನಡ (Kannada)
മലയാളം (Malayalam)
मराठी (Marathi)
ગુજરાતી (Gujarati)
ਪੰਜਾਬੀ (Punjabi)
বাংলা (Bengali)
ଓଡ଼ିଆ (Odia)
অসমীয়া (Assamese)
नेपाली (Nepali)
कोंकणी (Konkani)
মৈতৈলোন (Meitei / Manipuri)
Mizo (Lushai)
Log In
Administrator
University Coordinator
Home
Indian Institute of Technology Kharagpur
Electronics and Electrical Communication Engg
Design and Development of Jitter Measurement Circuit for High Speed SerDes System using 65 nm CMOS Process
Design and Development of Jitter Measurement Circuit for High Speed SerDes System using 65 nm CMOS Process
Loading...
Files
01_title.pdf
(93.71 KB)
04_abstract.pdf
(254.18 KB)
80_recommendation.pdf
(983.96 KB)
Date
item.page.authors
Journal Title
Journal ISSN
Volume Title
Publisher
Abstract
newline
Description
Keywords
Citation
URI
http://hdl.handle.net/10603/496246
Collections
Electronics and Electrical Communication Engg
item.page.endorsement
item.page.review
item.page.supplemented
item.page.referenced
Full item page