Certain design and analysis techniques for testing VLSI circuits

dc.contributor.guide	R, Maheswar
dc.coverage.spatial	Information and Communication Engineering
dc.creator.researcher	S, Vimalraj
dc.date.accessioned	2018-03-15T12:14:52Z
dc.date.available	2018-03-15T12:14:52Z
dc.date.awarded	n.d.
dc.date.completed	2016
dc.date.registered	n.d.
dc.description.abstract	Abstract available
dc.description.note	Data not available
dc.format.accompanyingmaterial	None
dc.format.dimensions	6cm.
dc.format.extent	xxiv, 231p.
dc.identifier.uri	http://hdl.handle.net/10603/196211
dc.language	English
dc.publisher.institution	Faculty of Information and Communication Engineering
dc.publisher.place	Chennai
dc.publisher.university	Anna University
dc.relation	213-230
dc.rights	university
dc.source.university	University
dc.subject.keyword	Dimensional
dc.subject.keyword	Sequential
dc.subject.keyword	Simulation
dc.subject.keyword	Syndrome
dc.subject.keyword	Wallace
dc.title	Certain design and analysis techniques for testing VLSI circuits
dc.type.degree	Ph.D.