Vlsi implementation of efficient algorithms for removal of noises in digital images

Abstract

The digital vision systems that handle the image signals encounter noise and fluctuations in illumination, intensity, and contrast factors, making a filter design essential today. Recent Approximate computing is a novel approach to design area-efficient arithmetic units for portable error resilient applications. High speed energy and area efficient filters are essential due to the unique unit used to tackle the noise during the early phases of visual processing. The architectures of the subsystems used in the filter design affect how well the visioning system performs. newlineIn this research work, three novel non-linear filters and its functional blocks are proposed for image denoising. In the first filter design, parallel architecture for median filter and the functional units for the median filter is proposed using an approximate computing techniques. The proposed Parallel Median Filter uses pre-sorter and post-merge units to replace corrupted processing pixel with a median of pixels in the 3X3 processing window. Approximate compare and swap blocks that can trade off area at the expense of accuracy are proposed and used in the proposed PMF. Two variants of PMF are realised based on the implementation of approximate CS units in the pre-sorter and post-merge blocks. PMF-design1 use the exact CS unit in the pre-sorter and approximate CS unit in the post-merge block (hereafter referred to as P-EA) and in PMF-design2, they use approximate CS unit in both pre-sorter and post-merge blocks (hereafter referred to as P-AA). newlineTo improve the efficiency than the parallel median filter, novel architecture for the average filter is proposed. Two average filter variations that use approximation in the subsystem design, aimed to achieve the best restoration at medium noise corrupted digital images. newline