Power Aware Test Architecture for System on Chip

Files

10. list of table.pdf (53.43 KB)

11. list of algorithm.pdf (48.67 KB)

12. list of abreviation.pdf (46.22 KB)

13. chapter-1.pdf (1.81 MB)

14. chapter-2.pdf (620.74 KB)

URI

http://hdl.handle.net/10603/337023

Collections

Institute of Technology